Power Electronics15 min read2025-12-20

ONSEMI SiC MOSFET Application Guide: From Gate Drive Design to Thermal Management

SiC MOSFETs enable dramatic efficiency improvements in EV inverters, EV chargers, and industrial motor drives — but only when designed correctly. This guide covers the practical pitfalls of SiC gate drive, PCB layout, and thermal design with ONSEMI Gen 2 SiC MOSFETs.

Why SiC MOSFETs Beat IGBTs in High-Voltage Applications


At 800V and above, SiC MOSFETs offer three compelling advantages over IGBTs:

1. **Lower switching losses**: SiC recovers in <50ns vs IGBT td(off) of 200–400ns

2. **Reduced cooling requirements**: 50–70% lower switching loss → dramatically smaller heatsinks

3. **Higher frequency operation**: Enables 50–100kHz switching vs 8–20kHz for IGBTs → smaller magnetics


ONSEMI Gen 2 SiC MOSFET Overview


ONSEMI second-generation (Gen 2) SiC MOSFETs (1200V and 650V) improve on Gen 1 with:

  • 25% lower Rds(on) for same die size → smaller conduction loss
  • Improved Vth stability (ΔVth <0.5V over 1000h at 175°C)
  • Kelvin source pin on all surface-mount packages → cleaner switching at high dI/dt

    • Gate Drive Design


    The #1 cause of SiC MOSFET failures is gate drive errors. Critical requirements:

  • Gate charge (Qg) is ~3× lower than equivalent IGBT → use >4A peak gate current
  • Vgs(on): +18V to +20V — do NOT use +15V (increased Rds(on))
  • Vgs(off): -3V to -5V — negative off-voltage prevents spurious turn-on during fast dV/dt
  • Gate resistor (Rg): 2.2Ω to 10Ω — start at 4.7Ω and adjust for dI/dt

    • PCB Layout: The 4 Rules


    1. Minimize power loop area (the loop formed by DC link → MOSFET → source → DC link return)

    2. Place gate resistor within 5mm of gate pin — not at the driver

    3. Use Kelvin source connection to separate power and signal grounds

    4. Separate high-current power ground from sensitive signal ground at a single point