Challenge
An AI inference accelerator startup needed to feed a custom NPU with 1TB/s+ memory bandwidth at reasonable power budget. DDR5 and LPDDR5 could not meet the bandwidth-per-watt target for their thermal-constrained edge server form factor.
Solution
CoreWin worked with Micron's compute team to specify HBM3E with 8-high stacks achieving 1.2TB/s at 1.1TB/s/W. We provided signal integrity analysis for the 5000+ via interposer routing and characterization support for the 2.5D packaging.
Key Outcomes
1.2TB/s memory bandwidth achieved at 1.1TB/s/W
Inference throughput: 3.8× improvement over DDR5 baseline
Edge server thermal budget met with passive cooling
Mass production ramp Q3 2025